IS43LR32100C Description
IS43LR32100C IS46LR32100C 512K x 32Bits x 2Banks Mobile DDR SDRAM .
The IS43/46LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits.
IS43LR32100C Features
* JEDEC standard 1.8V power supply
* Two internal banks for concurrent operation
* MRS cycle with address key programs
- CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
* Fully differential clock inputs (CK, /CK)
IS43LR32100C Applications
* where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance
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