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IS43LR32100C, IS46LR32100C Datasheet - ISSI

IS43LR32100C - 512K x 32Bits x 2Banks Mobile DDR SDRAM

The IS43/46LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits.

This product uses a double-data-rate architecture to achieve high-speed operation.

The double data rate architecture is essentially a 2N prefetch architecture with an

IS43LR32100C Features

* JEDEC standard 1.8V power supply

* Two internal banks for concurrent operation

* MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)

* Fully differential clock inputs (CK, /CK)

IS46LR32100C-ISSI.pdf

This datasheet PDF includes multiple part numbers: IS43LR32100C, IS46LR32100C. Please refer to the document for exact specifications by model.
IS43LR32100C Datasheet Preview Page 2 IS43LR32100C Datasheet Preview Page 3

Datasheet Details

Part number:

IS43LR32100C, IS46LR32100C

Manufacturer:

ISSI

File Size:

1.16 MB

Description:

512k x 32bits x 2banks mobile ddr sdram.

Note:

This datasheet PDF includes multiple part numbers: IS43LR32100C, IS46LR32100C.
Please refer to the document for exact specifications by model.

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