The IS43/46LR32200C is 67,108,864 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 524,288 words x 32 bits.
This product uses a double-data-rate architecture to achieve high-speed operation.
The Data Input/ Output signals are transmitted on a 32-bit bus.
The double data rat
IS43LR32200C Features
* JEDEC standard 1.8V power supply.
* VDD = 1.8V, VDDQ = 1.8V
* Four internal banks for concurrent operation
* MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
* Fully differenti
Datasheet Details
IS43LR32200C, IS46LR32200C
ISSI
1.17 MB
512k x 32bits x 4banks mobile ddr sdram.
This datasheet PDF includes multiple part numbers: IS43LR32200C, IS46LR32200C.
Please refer to the document for exact specifications by model.
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