The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits.
This product uses a double-data-rate architecture to achieve high-speed operation.
The Data Input/ Output signals are transmitted on a 16-bit bus.
The double data
IS46LR16320C Features
* JEDEC standard 1.8V power supply
* VDD = 1.8V, VDDQ = 1.8V
* Four internal banks for concurrent operation
* MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
* Fully differentia
Datasheet Details
IS46LR16320C, IS43LR16320C
ISSI
838.80 KB
8m x 16bits x 4banks mobile ddr sdram.
This datasheet PDF includes multiple part numbers: IS46LR16320C, IS43LR16320C.
Please refer to the document for exact specifications by model.
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