Description
IS43R83200D IS43/46R16160D, IS43/46R32800D JUNE 2012 8Mx32, 16Mx16, 32Mx8 256Mb DDR SDRAM .
x8
A0-A12 A0-A9 BA0, BA1 DQ0.
DQ7 CK, CK CKE CS CAS RAS WE Row Address Input Column Address Input Bank Select Address Data I/O System Clock.
Features
* VDD and VDDQ: 2.5V ± 0.2V
* SSTL_2 compatible I/O
* Double-data rate architecture; two data transfers per clock cycle
* Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver
* DQS is edge-align
Applications
* where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance
