* 100 percent bus utilization
* No wait cycles between Read and Write
* Internal self-timed write cycle
* Individual Byte Write Control
* Single R/W (Read/Write) control pin
* Clock controlled, registered address, data and control
* Interleaved
IS61NVVP51236B Datasheet (1.92 MB)
IS61NVVP51236B
ISSI
1.92 MB
18mb state bus synchronous sram.
IS61NLP51236(32)B/IS61NVP51236(32)B/IS61NVVP51236(32)B IS61NLP102418B/IS61NVP102418B/IS61NVVP102418B 512K x36 and 1024K x18 18Mb, PIPELINE 'NO WAIT' .
📁 Related Datasheet
IS61NVVP51236 (IS61NVVP25672 / IS61NVVP51236) STATE BUS SRAM (ISSI)
IS61NVVP51232B 18Mb STATE BUS SYNCHRONOUS SRAM (ISSI)
IS61NVVP102418B 18Mb STATE BUS SYNCHRONOUS SRAM (ISSI)
IS61NVVP204836B PIPELINE (NO WAIT) STATE BUS SRAM (Integrated Silicon Solution)
IS61NVVP25672 (IS61NVVP25672 / IS61NVVP51236) STATE BUS SRAM (ISSI)
IS61NVVP409618B PIPELINE (NO WAIT) STATE BUS SRAM (Integrated Silicon Solution)
IS61NVVF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM (Integrated Silicon Solution)
IS61NVVF409618B FLOW THROUGH (NO WAIT) STATE BUS SRAM (Integrated Silicon Solution)
IS61NVF102418 STATE BUS SRAM (Integrated Silicon Solution)
IS61NVF102436A 36Mb STATE BUS SRAM (ISSI)
