* 100 percent bus utilization * No wait cycles between Read and Write * Internal self-timed write cycle * Individual Byte Write Control * Single Read/Write control pin * Clock controlled, registered address, data and control * Interleaved or l
IS61NVF51236_IntegratedSiliconSolution.pdf
Datasheet Details
IS61NVF102418, IS61NVF51236
Integrated Silicon Solution
496.97 KB
State bus sram.
This datasheet PDF includes multiple part numbers: IS61NVF102418, IS61NVF51236.
Please refer to the document for exact specifications by model.
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