IS61NVP204818A Datasheet - Integrated Silicon Solution

IS61NVP204818A 36Mb STATE BUS SRAM

IS61NVP204818A Features

* 100 percent bus utilization

* No wait cycles between Read and Write

* Internal self-timed write cycle

* Individual Byte Write Control

* Single R/W (Read/Write) control pin

* Clock controlled, registered address, data and control

* Interleaved

Datasheet Details

IS61NVP204818A

Integrated Silicon Solution

168.59 KB

36mb state bus sram.

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