IS61NVP25636A - 9Mb STATE BUS SRAM

ISSI

IS61NVP25636A Datasheet Preview — Preview of IS61NVP25636A PDF

Datasheet Details

Part number	IS61NVP25636A
Manufacturer	ISSI
File Size	681.44 KB
Description	9Mb STATE BUS SRAM
Datasheet	IS61NVP25636A_ISSI.pdf

IS61NVP25636A Product details

Description

The 9 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications.

Features

100 percent bus utilization.
No wait cycles between Read and Write.
Internal self-timed write cycle.
Individual Byte Write Control.
Single R/W (Read/Write) control pin.
Clock controlled, registered address, data and control.
Interleaved or linear burst sequence control us- ing MODE input.
Three chip enables for simple depth expansion and address pipelining.
Power Down mode.
Common data inputs and data outp.

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Published: Jul 12, 2008 |