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IS61QDB21M36C Datasheet - ISSI

36Mb QUAD Synchronous SRAM

IS61QDB21M36C Features

* 1Mx36 and 2Mx18 configuration available.

* On-chip Delay-Locked Loop (DLL) for wide data valid window.

* Separate independent read and write ports with concurrent read and write operations.

* Synchronous pipeline read with EARLY write operation.

* Double Data Rate (DDR) interfa

IS61QDB21M36C General Description

The Mb and are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer t.

IS61QDB21M36C Datasheet (846.71 KB)

Preview of IS61QDB21M36C PDF

Datasheet Details

Part number:

IS61QDB21M36C

Manufacturer:

ISSI

File Size:

846.71 KB

Description:

36mb quad synchronous sram.

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IS61QDB21M36C 36Mb QUAD Synchronous SRAM ISSI

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