Datasheet4U Logo Datasheet4U.com

IS61QDP2B21M36A1

36Mb QUADP (Burst 2) Synchronous SRAM

IS61QDP2B21M36A1 Features

* 1Mx36 and 2Mx18 configuration available.

* On-chip Delay-Locked Loop (DLL) for wide data valid window.

* Separate independent read and write ports with concurrent read and write operations.

* Synchronous pipeline read with EARLY write operation.

* Double Data Rate (DDR) interfa

IS61QDP2B21M36A1 General Description

The and are synchronous, high- performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to t.

IS61QDP2B21M36A1 Datasheet (660.37 KB)

Preview of IS61QDP2B21M36A1 PDF

Datasheet Details

Part number:

IS61QDP2B21M36A1

Manufacturer:

ISSI

File Size:

660.37 KB

Description:

36mb quadp (burst 2) synchronous sram.

📁 Related Datasheet

IS61QDP2B21M36A 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B21M36A2 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B21M18A 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B21M18A1 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B21M18A2 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B22M18A 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B22M18A1 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B22M18A2 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B22M36A 72Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDP2B22M36A1 72Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

TAGS

IS61QDP2B21M36A1 36Mb QUADP Burst Synchronous SRAM ISSI

Image Gallery

IS61QDP2B21M36A1 Datasheet Preview Page 2 IS61QDP2B21M36A1 Datasheet Preview Page 3

IS61QDP2B21M36A1 Distributor