ICSLV810 Datasheet - Integrated Circuit Systems

ICSLV810 Buffer/Clock Driver

The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout buffer. This device is specifically designed for data communications clock management. The large fanout from a single input line reduces loading on the input clock. The TTL level outputs reduce noise levels on the part. Typical applications are .

ICSLV810 Features

* Packaged in 20-pin QSOP/SSOP

* Split 1:10 fanout Buffer

* Maximum skew between outputs of different

* packages 0.75 ns Max propagation delay of 3.8 ns Operating voltage of 1.5 V to 2.5 V on Bank A Operating

ICSLV810_IntegratedCircuitSystems.pdf