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MK2049-45 Datasheet - Integrated Circuit Systems

MK2049-45 3.3V Communications Clock PLL

The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication. Basic configura.

MK2049-45 Features

* Packaged in 20 pin SOIC

* 3.3 V + 5% operation

* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz Locks

MK2049-45_IntegratedCircuitSystems.pdf

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Datasheet Details

Part number:

MK2049-45

Manufacturer:

Integrated Circuit Systems

File Size:

212.72 KB

Description:

3.3v communications clock pll.

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TAGS

MK2049-45 MK2049-45 3.3V Communications Clock PLL Integrated Circuit Systems

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