MK2049-02 Datasheet - Integrated Circuit Systems

MK2049-02 - Communications Clock PLLs

The MK2049-02 and MK2049-03 are PhaseLocked Loop (PLL) based clock synthesizers that accept multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-02/03 generate T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks frequ.

MK2049-02 Features

* Packaged in 20 pin SOIC

* Fixed input-output phase relationship on most clock selections

* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E

* Accept multiple in

MK2049-02_IntegratedCircuitSystems.pdf