MK2049-01 Datasheet - Integrated Circuit Systems

MK2049-01 - Communications Clock PLL

The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies. The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing. All outputs are frequency lock.

MK2049-01 Features

* Packaged in 20 pin SOIC

* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E

* Accepts multiple inputs: 8 kHz backplane clock or Loop Timing frequencies

* Locks t

MK2049-01_IntegratedCircuitSystems.pdf