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MK2049-35 3.3 V Communications Clock PLL

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Description

MK2049-35 3.3 V Communications Clock PLL .
The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies.

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Datasheet Specifications

Part number
MK2049-35
Manufacturer
Integrated Circuit Systems
File Size
125.68 KB
Datasheet
MK2049-35_IntegratedCircuitSystems.pdf
Description
3.3 V Communications Clock PLL

Features

* Packaged in 20 pin SOIC
* 3.3 V ±5% operation
* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E
* Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 M

Applications

* dept. at 408-297-1201 for the recommended value for your app. Frequency Select 0. Determines CLK input/outputs per tables on page 4. Type: XI, XO = crystal connections, I = Input, O = output, P = power supply connection, LF = loop filter connections 2 Revision 121300 Integrated Circuit Systems, In

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