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MK2049-36

CLOCK PLL

MK2049-36 Features

* Packaged in 20 pin SOIC

* Pb (lead) free package

* 3.3 V + 5% operation

* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E

* Accepts multiple inputs: 8

MK2049-36 General Description

The MK2049-36 is a Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications frequencies. This allows for the generation of clocks frequency-locked to an 8 k.

MK2049-36 Datasheet (215.82 KB)

Preview of MK2049-36 PDF

Datasheet Details

Part number:

MK2049-36

Manufacturer:

Renesas ↗

File Size:

215.82 KB

Description:

Clock pll.

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TAGS

MK2049-36 CLOCK PLL Renesas

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