8T73S208 Differential LVPECL Clock Divider and Fanout Buffer

Integrated Device Technology

Description

2.5 V, 3.3 V Differential LVPECL Clock Divider and Fanout Buffer 8T73S208 Datasheet General .
The 8T73S208 is a high-performance differential LVPECL clock divider and fanout buffer.

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Datasheet Specifications

Part number: 8T73S208
Manufacturer: Integrated Device Technology
File Size: 377.22 KB
Datasheet: 8T73S208-IntegratedDeviceTechnology.pdf
Description: Differential LVPECL Clock Divider and Fanout Buffer

Features

* One differential input reference clock
* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML
* Integrated

Applications

* demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up

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8T73S208 Differential LVPECL Clock Divider and Fanout Buffer Integrated Device Technology

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