8T73S208 Datasheet (Integrated Device Technology) - Differential LVPECL Clock Divider and Fanout Buffer

8T73S208, Differential LVPECL Clock Divider and Fanout Buffer

The 8T73S208 is a high-performance differential LVPECL clock divider and fanout buffer.

The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks.

The 8T73S208 is characterized to operate from a 2.5V and 3.3V power supply.

Guaranteed output-to-outp

8T73S208 Features

* One differential input reference clock

* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML

* Integrated