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8T74S208C-01 2.5 V Differential LVDS Clock Divider and Fanout Buffer

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Description

2.5 V Differential LVDS Clock Divider and Fanout Buffer 8T74S208C-01 Datasheet General .
The 8T74S208C-01 is a high-performance differential LVDS clock divider and fanout buffer.

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Datasheet Specifications

Part number
8T74S208C-01
Manufacturer
IDT
File Size
324.93 KB
Datasheet
8T74S208C-01-IDT.pdf
Description
2.5 V Differential LVDS Clock Divider and Fanout Buffer

Features

* One differential input reference clock Differential pair can accept the following differential input levels: LVDS, LVPECL, CML Integrated input terminati

Applications

* demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up

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