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8T74S208 - 2.5V Differential LVDS Clock Divider and Fanout Buffer

8T74S208 Description

2.5V Differential LVDS Clock Divider and Fanout Buffer 8T74S208 DATA SHEET General .
The 8T74S208 is a high-performance differential LVDS clock divider and fanout buffer.

8T74S208 Features

* One differential input reference clock
* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML
* Integrated input termination

8T74S208 Applications

* demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up

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Datasheet Details

Part number
8T74S208
Manufacturer
IDT
File Size
277.80 KB
Datasheet
8T74S208-IDT.pdf
Description
2.5V Differential LVDS Clock Divider and Fanout Buffer

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  • 8T73S208 - Differential LVPECL Clock Divider and Fanout Buffer (Integrated Device Technology)

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