8T74S208B LVDS Clock Divider and Fanout Buffer

Renesas

Description

2.5V Differential LVDS Clock Divider and Fanout Buffer 8T74S208B Datasheet .
The 8T74S208B is a high-performance differential LVDS clock divider and fanout buffer.

📥 Download Datasheet

8T74S208B Datasheet Preview — Preview of 8T74S208B PDF

Datasheet Specifications

Part number: 8T74S208B
Manufacturer: Renesas ↗
File Size: 632.27 KB
Datasheet: 8T74S208B-Renesas.pdf
Description: LVDS Clock Divider and Fanout Buffer

Features

* One differential input reference clock
* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML
* Integrated input termination resistors
* Eight LVDS outputs
* Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8

Applications

* demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up

8T74S208B Distributors

📁 Related Datasheet

8T74S208 8T74S208A-01 8T74S208C-01 8T73S208 8T73S208A-01 8T73S208B-01

📌 All Tags

8T74S208B LVDS Clock Divider and Fanout Buffer Renesas

Renesas 8T74S208B-like datasheet

8T73S1802

8T79S308