* Internal self-timed write cycle
* Individual Byte Write Control and Global Write
* Clock controlled, registered address, data and control
* Pentium™ or linear burst sequence control using MODE input
* Three chip enable option for simple depth expansion and a
IS61SPD25632T Datasheet (154.12 KB)
IS61SPD25632T
Integrated Silicon Solution Inc
154.12 KB
256k x 32/ 256k x 36/ 512k x 18 synchronous pipeline/ double-cycle deselect static ram.
IS61SPD25632T/D IS61LPD25632T/D IS61SPD25636T/D IS61LPD25636T/D IS61SPD51218T/D IS61LPD51218T/D
256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, .
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