IS61SP12832 Datasheet (Integrated Circuit Solution) - 128K x 32 SYNCHRONOUS PIPELINED STATIC RAM

IS61SP12832, 128K x 32 SYNCHRONOUS PIPELINED STATIC RAM

The ICSI IS61SP12832 is a high-speed, low-power synchro- nous static RAM designed to provide a burstable, high-performance, secondary cache for the Pentium™, 680X0™, and PowerPC™ microprocessors.

It is organized as 131,072 words by 32 bits, fabricated with ICSI's advanced CMOS technology.

The device

IS61SP12832 Features

* Internal self-timed write cycle

* Individual Byte Write Control and Global Write

* Clock controlled, registered address, data and control

* Pentium™ or linear burst sequence control using MODE input

* Three chip enables for simple depth expansion and address