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IS43R32800B Datasheet - Integrated Silicon Solution

IS43R32800B - 256Mb DDR Synchronous DRAM PRELIMINARY INFORMATION

IS43R32800B is a 4-bank x 2,097,152-word x32bit Double Data Rate Synchronous DRAM, with SSTL_2 interface.

All control and address signals are referenced to the rising edge of CLK.

Input data is registered on both edges of data strobe, and output data and data strobe are referenced on both edges of

IS43R32800B Features

* Vdd/Vddq=2.5V+0.2V (-5, -6, -75)

* Double data rate architecture; two data transfers per clock cycle

* Bidirectional, data strobe (DQS) is transmitted/ received with data

* Differential clock input (CLK and /CLK)

* DLL aligns DQ and DQS transitions with

IS43R32800B-IntegratedSiliconSolution.pdf

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Datasheet Details

Part number:

IS43R32800B

Manufacturer:

Integrated Silicon Solution

File Size:

452.83 KB

Description:

256mb ddr synchronous dram preliminary information.

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