Datasheet Details
Part number:
IS61DDB24M18
Manufacturer:
Integrated Silicon Solution
File Size:
572.80 KB
Description:
Ddr-ii (burst of 2) cio synchronous srams.
IS61DDB24M18-IntegratedSiliconSolution.pdf
Datasheet Details
Part number:
IS61DDB24M18
Manufacturer:
Integrated Silicon Solution
File Size:
572.80 KB
Description:
Ddr-ii (burst of 2) cio synchronous srams.
IS61DDB24M18, DDR-II (Burst of 2) CIO Synchronous SRAMs
The 72Mb IS61DDB22M36 and IS61DDB24M18 are synchronous, high-performance CMOS static random access memory (SRAM) devices.
These SRAMs have a common I/O bus.
The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed.
Refer to the Timing Reference Diagra
IS61DDB24M18 Features
* 2M x 36 or 4M x 18.
* On-chip delay-locked loop (DLL) for wide data valid window.
* Common data input/output bus.
* Synchronous pipeline read with self-timed late write operation.
* Double data rate (DDR-II) interface for read and write input ports.
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