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IS61DDB24M18A

72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM

IS61DDB24M18A Features

* 2Mx36 and 4Mx18 configuration available.

* On-chip delay-locked loop (DLL) for wide data valid window.

* Common I/O read and write ports.

* Synchronous pipeline read with self-timed late write operation.

* Double Data Rate (DDR) interface for read and write input ports.

* F

IS61DDB24M18A General Description

The 72Mb IS61DDB22M36A and IS61DDB24M18A are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have a common I/O bus. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to the Timing Reference Diag.

IS61DDB24M18A Datasheet (588.99 KB)

Preview of IS61DDB24M18A PDF

Datasheet Details

Part number:

IS61DDB24M18A

Manufacturer:

Integrated Silicon Solution

File Size:

588.99 KB

Description:

72mb ddr-ii (burst 2) cio synchronous sram.

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IS61DDB24M18A 72Mb DDR-II Burst CIO SYNCHRONOUS SRAM Integrated Silicon Solution

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