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IS61DDP2B21M18A Datasheet - Integrated Silicon Solution

IS61DDP2B21M18A 18Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM

* 512Kx36 and 1Mx18 configuration available. * On-chip Delay-Locked Loop (DLL) for wide data valid window. * Common I/O read and write ports. * Synchronous pipeline read with self-timed late write operation. * Double Data Rate (DDR) interface for read and write input ports. .

IS61DDP2B21M18A Datasheet (516.80 KB)

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Datasheet Details

Part number:

IS61DDP2B21M18A

Manufacturer:

Integrated Silicon Solution

File Size:

516.80 KB

Description:

18mb ddr-iip (burst 2) cio synchronous sram.

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IS61DDP2B21M18A 18Mb DDR-IIP Burst CIO SYNCHRONOUS SRAM Integrated Silicon Solution

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