* Internal self-timed write cycle
* Individual Byte Write Control and Global Write
* Clock controlled, registered address, data and
* control
* Burst sequence control using MODE input
* Three chip enable option for simple depth expansion and address pi
IS61LPS51236B Datasheet (1.55 MB)
IS61LPS51236B
Integrated Silicon Solution
1.55 MB
Single cycle deselect static ram.
IS61LPS51236B/IS61VPS51236B/IS61VVPS51236B IS61LPS102418B/IS61VPS102418B/IS61VVPS102418B 512K x36 and 1024K x18 18Mb SYNCHRONOUS PIPELINED SINGLE CYC.
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