IS61NSCS25672 - Synchronous SRAM

Integrated Silicon Solution

Datasheet Details

Part number	IS61NSCS25672
Manufacturer	Integrated Silicon Solution
File Size	219.50 KB
Description	Synchronous SRAM
Datasheet	IS61NSCS25672_IntegratedSiliconSolution.pdf

Because SigmaRAM is a synchronous device, address, data Inputs, and read/write control inputs are captured on the rising edge of the input clock.

JEDEC SigmaRam pinout and package standard.
Single 1.8V power supply (VCC): 1.7V (min) to 1.9V (max).
Dedicated output supply voltage (VCCQ): 1.8V or 1.5V typical.
LVCMOS-compatible I/O interface.
Common data I/O pins (DQs).
Single Data Rate (SDR) data transfers.
Pipelined (PL) read operations.
Double Late Write (DLW) write operations.
Burst and non-burst read and write operations, selectable via dedicated control.

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Published: Sep 6, 2013 |