Description
IS61NSCS25672 IS61NSCS51236 Σ RAM 256K x 72, 512K x 36 .
Because SigmaRAM is a synchronous device, address, data Inputs, and read/write control inputs are captured on the rising edge of the input clock.
Features
* JEDEC SigmaRam pinout and package standard
* Single 1.8V power supply (VCC): 1.7V (min) to 1.9V (max)
* Dedicated output supply voltage (VCCQ): 1.8V or 1.5V typical
* LVCMOS-compatible I/O interface
* Common data I/O pins (DQs)
* Single Data Rate (SD
Applications
* for fast synchronous SRAMs in networking systems are extremely diverse. ΣRAMs have been developed to address the diverse needs of the networking market in a manner that can be supported with a unified development and manufacturing infrastructure. ΣRAMs address each of the bus protocol options common
