CD4508BMS CMOS Dual 4-Bit Latch

Intersil Corporation

CD4508BMS Description

CD4508BMS December 1992 CMOS Dual 4-Bit Latch Pinout CD4508BMS TOP VIEW RESET A 1 STROBE A 2 OUTPUT DISABLE A 3 D0A 4 Q0A 5 D1A 6 Q1A 7 D2A 8 Q2A 9 D.
of ‘B’ Series CMOS Devices" Functional Diagram OUTPUT DISABLE D0A Q0A 4-BIT LATCH Q1A 3-STATE OUTUTS Q2A Q3A Applications. Buffer Storage.

CD4508BMS Features

* High-Voltage Types (20-Volt Rating)
* Two Independent 4-Bit Latches
* Individual Master Reset for Each 4-Bit Latch

CD4508BMS Applications

* Medium-Speed Operation: tPHL = tPLH = 70nS (Typ. ) at VDD = 10V and CL = 50pF
* 100% Tested for Quiescent Current at 20V
* 5V, 10V, and 15V Parametric Ratings
* Standardized, Symmetrical Output Characteristics
* Maximum Input Current of 1µA at 18V Over Full P

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Datasheet Details

Part number: CD4508BMS
Manufacturer: Intersil Corporation
File Size: 85.97 KB
Datasheet: CD4508BMS_IntersilCorporation.pdf
Description: CMOS Dual 4-Bit Latch

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CMOS Dual 4-Bit Latch Intersil Corporation

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