* High-Voltage Types (20-Volt Rating)
* Two Independent 4-Bit Latches
* Individual Master Reset for Each 4-Bit Latch
* 3-State Outputs with High-Impedance State for Bus Line Applications
* Medium-Speed Operation: tPHL = tPLH = 70nS (Typ.) at VDD = 10V and CL =
CD4508BMS Datasheet (85.97 KB)
CD4508BMS
Intersil Corporation
85.97 KB
Cmos dual 4-bit latch.
CD4508BMS December 1992 CMOS Dual 4-Bit Latch Pinout CD4508BMS TOP VIEW RESET A 1 STROBE A 2 OUTPUT DISABLE A 3 D0A 4 Q0A 5 D1A 6 Q1A 7 D2A 8 Q2A 9 D.
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