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CD40105BMS CMOS FIFO Register

CD40105BMS Description

CD40105BMS December 1992 CMOS FIFO Register .
CD40105BMS is a low-power first-in-first-out (FIFO) “elastic” storage register that can store 16 4-bit words.

CD40105BMS Features

* 4 Bits x 16 Words
* High Voltage Type (20V Rating)
* Independent Asynchronous Inputs and Outputs
* 3-State Outputs
* Expandable in Either Direction
* Status Indicators on Input and Output
* Reset Capability
* Standardized Symmetrical

CD40105BMS Applications

* Bit Rate Smoothing
* CPU/Terminal Buffering
* Data Communications
* Peripheral Buffering
* Line Printer Input Buffers
* Auto Dialers
* CRT Buffer Memories
* Radar Data Acquisition Pinout 3 - STATE CONTROL 1 DIR SI D0 D1 D2 D3 VSS 2 3

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CMOS FIFO Register Intersil Corporation
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