HMS30C7202 Datasheet (MagnaChip Semiconductor)

HMS30C7202, 32-Bit MPU

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Change Log Issue A-01 A-02 A-03 A-04 A-05 A-06 A-07 A-08 A-10 A-11 A-12 A-13 A-14 Date 2002/08/27 2002/08/28 2002/10/01 2002/10/05 2002/10/14 2002/12/28 2003/01/09 2003/02/26 2003/03/03 2003/03/28 2003/06/03 2003/09/15 2004/05/12 By Kisun Kim Kisun Kim Kisun Kim Kisun Ki

HMS30C7202 Highly-integrated MPU (ARM Based 32-Bit Microprocessor) Datasheet Version 1.4 MagnaChip Semiconductor Ltd.

- ii - Version 1.4 HMS30C7202 Copyright.

2004 MagnaChip Semiconductor Ltd.

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HMS30C7202 Features

* 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes combined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with individ