* a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compati
MAX1124
Maxim Integrated ↗ Products
230.18 KB
250msps analog-to-digital converter.
19-3029; Rev 1; 2/04
www.DataSheet4U.com
1.8V, 10-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications
General Descr.
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