SY55853U - D Latch
The SY55853U is a latch.
Its differential output will flow through the input while it's enable is high.
The output will remain static while the enable is low.
In addition, an asynchronous, level sensitive reset is provided.
SY55853U inputs can be terminated with a single resistor between the true an
SY55853U Features
* s 2.5GHz min fmax s 2.3V to 5.7V power supply s Single bit latch s Stores or flows through 1 bit of data s Optimized to work with SuperLite™ family s Fully differential s Source terminated CML outputs for fast edge rates s Accepts CML, PECL, LVPECL input logic levels s Available in a tiny 10-pin MSO
