MT8LSDT3264A Datasheet - Micron Technology

MT8LSDT3264A SYNCHRONOUS DRAM MODULE

SYMBOL RAS#, CAS#, WE# CK0-CK3 TYPE Input Input DESCRIPTION Command Inputs: RAS#, CAS#, and WE# (along with S#) define the command being entered. Clock: CK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CK. CK also increments the internal burst counter an.

MT8LSDT3264A Features

* PC100- and PC133-compliant

* JEDEC-standard 168-pin, dual in-line memory module (DIMM)

* Unbuffered

* 256MB (32 Meg x 64), 512MB (64 Meg x 64)

* Single +3.3V ±0.3V power supply

* Fully synchronous; all signals registered on positive edge of system cl

MT8LSDT3264A Datasheet (614.68 KB)