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SN54LS109A Datasheet - Motorola Inc

SN54LS109A DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

SN54/74LS109A DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS109A consists of two high speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together. LOGIC DIAGRAM DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY SET (SD) 5(11) Q CLEAR (CD) 1(15) CLOCK 4(12) Q 7(9) J 2(14) 6(10) J SUFFIX CERAMIC.

SN54LS109A_MotorolaInc.pdf

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Datasheet Details

Part number:

SN54LS109A

Manufacturer:

Motorola Inc

File Size:

147.54 KB

Description:

Dual jk positive edge-triggered flip-flop.

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SN54LS109A SN54LS109A DUAL POSITIVE EDGE-TRIGGERED FLIP-FLOP Motorola Inc

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