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MC88915FN55PLCC Datasheet - Motorola

Low Skew CMOS PLL Clock Driver

MC88915FN55PLCC Features

* Five Outputs (QO

* Q4) with Output

* Output Skew < 500 ps each being phase and frequency locked to the SYNC input

* The phase variation from part

* to

* part between the SYNC and FEEDBACK inputs is less than 550 ps (derived from the tPD specification, which

MC88915FN55PLCC General Description

on page 11). A lock indicator output (LOCK) will go high when the loop is in steady *state phase and frequency lock. The LOCK output will go low if phase *lock is lost or when the PLL_EN pin is low. Under certain conditions the lock output may remain low, even though the part is phase<.

MC88915FN55PLCC Datasheet (147.04 KB)

Preview of MC88915FN55PLCC PDF

Datasheet Details

Part number:

MC88915FN55PLCC

Manufacturer:

Motorola

File Size:

147.04 KB

Description:

Low skew cmos pll clock driver.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Skew CMOS PLL Clock Driver The MC88915 Clock Driver utilizes phase locked loop technology to lock .

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MC88915FN55PLCC Low Skew CMOS PLL Clock Driver Motorola

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