MCM69P736 Datasheet (Motorola) - 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

MCM69P736, 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address.

Used to initiate a READ, WRITE, or chip deselect.

Synchronous Address Status Processor: Active low, interrupts any ongoing burst an

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69P736/D 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P736 is a 4M bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the PowerPC™ and other high performance microprocessors.

It is organized as 128K words of 36 bits each.

This device integrates input registers, an output register, a 2 bit address counter, and high speed SRAM onto a single monolit

MCM69P736 Features

* otes This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high

* impedance circuit. NOTES: 1. P