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MCM69P737 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

MCM69P737 Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69P737/D 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P737.
Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new.

MCM69P737 Features

* byte write signals SBx are being used, tie this pin low. Core Power Supply. I/O Power Supply. Ground. No Connection: There is no connection to the chip. 89 31 K LBO Input Input 32, 33, 34, 35, 44, 45, 46, 47, 48,

MCM69P737 Applications

* Synchronous design allows precise cycle control with the use of an external clock (K). Addresses (SA), data inputs (DQx), and all control signals except output enable (G) and linear burst order (LBO) are clock (K) controlled through positive
* edge
* triggered noninverting registers. B

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Datasheet Details

Part number
MCM69P737
Manufacturer
Motorola
File Size
279.92 KB
Datasheet
MCM69P737_MotorolaInc.pdf
Description
128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

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128K Bit Pipelined BurstRAM Synchronous Fast Static RAM Motorola
Motorola MCM69P737-like datasheet