MPC2005 - 256KB and 512KB BurstRAM
of the cache module.
The module family pinout will support 5 V and 3.3 V components for a clear path to lower voltage and power savings.
Both power supplies must be connected.
These cache modules are plug and pin compatible with the MPC2006, a 1MB synchronous module also designed for the PReP and CH
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2004/D Advance Information 256KB and 512KB BurstRAM™ Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms The MPC2004 and MPC2005 are designed to provide burstable, high performance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications.
The modules are configured as 32K x 72 and 64K x 72
MPC2005 Features
* d all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey
