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MPC2005 - 256KB and 512KB BurstRAM

This page provides the datasheet information for the MPC2005, a member of the MPC2004 256KB and 512KB BurstRAM family.

Datasheet Summary

Description

of the cache module.

The module family pinout will support 5 V and 3.3 V components for a clear path to lower voltage and power savings.

Both power supplies must be connected.

Features

  • d all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different.

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Datasheet preview – MPC2005

Datasheet Details

Part number MPC2005
Manufacturer Motorola
File Size 73.93 KB
Description 256KB and 512KB BurstRAM
Datasheet download datasheet MPC2005 Datasheet
Additional preview pages of the MPC2005 datasheet.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2004/D Advance Information 256KB and 512KB BurstRAM™ Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms The MPC2004 and MPC2005 are designed to provide burstable, high performance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. The modules are configured as 32K x 72 and 64K x 72 bits in a 182 (91 x 2) pin DIMM format. Each module uses four of Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and a 5 V cache tag RAM configured as 16K x 12 for tag field plus 16K x 2 for valid and dirty status bits. Bursts can be initiated with the SRAMADS signal.
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