MTP75N06HD - TMOS POWER FET
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTP75N06HD/D Designer's HDTMOS E-FET ™ High Density Power FET N Channel Enhancement Mode Silicon Gate This advanced high cell density HDTMOS E FET is designed to withstand high energy in the avalanche and commutation modes.
This new energy efficient design also offers a drain to source diode with a fast recovery time.
Designed for low voltage, high speed switching appl
MTP75N06HD Features
* owever, snubbing reduces switching losses. 7000 6000 VDS = 0 V Ciss VGS = 0 V TJ = 25°C C, CAPACITANCE (pF) 5000 4000 3000 2000 Coss 1000 Crss 0 10 5 VGS 0 VDS 5 10 15 20 25 Ciss Crss GATE
* TO
* SOURCE OR DRAIN
* TO
* SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Vari
