UPD485506 - LINE BUFFER
The µPD485506 is a high speed FIFO (First In First Out) line buffer.
Word organization can be changed either 5,048 words by 16 bits or 10,096 words by 8 bits.
Its CMOS static circuitry provides high speed access and low power consumption.
The µPD485506 can be used for one line delay and time axis co
UPD485506 Features
* 5,048 words by 16 bits (Word mode) /10,096 words by 8 bits (Byte mode)
* Asynchronous read/write operations available
* Variable length delay bits; 21 to 5,048 bits or 10,096 bits (Cycle time: 25 ns) 15 to 5,048 bits or 10,096 bits (Cycle time: 35 ns)
* Power supply
