S7A401830M Datasheet - NETSOL

S7A401830M 128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM

The S7A403630M and S7A401830M are 4,718,592-bit Synchronous Static Random Access Memory designed for high performance. It is organized as 128K(256K) words of 36(18) bits and integrates address and control registers, a 2-bit burst address counter and added some new functions for high performance appl.

SSSS7777AAAA444400001331866833330000MMMM 128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM 128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM 4Mb Sync. Pipelined Burst SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein rem.

S7A401830M Features

* VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply

* VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V)

* Synchronous Operation

* 2 Stage Pipelined operation with 4 Burst

* On-Chip Address Counter

* Self-Time

S7A401830M Datasheet (473.62 KB)