The S7K6436T2M and S7K6418T2M are 75,497,472-bits DDR Common I/O Synchronous Pipelined Burst SRAMs.
They are organized as 2,097,152 words by 36bits for S7K6436T2M and 4,194,304 words by 18 bits for S7K6418T2M .
Address, data inputs, and all control signals are synchronized to the input clock ( K or
SS77KK66443366TT22MM SS77KK66441188TT22MM 22MMxx3366 && 44MMxx1188 DDDDRRIIII++ CCIIOO BBLL22 SSRRAAMM 72Mb DDRII+ CIO BL2 SRAM Specification (2.0 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.
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This document and
S7K6418T2M Features
* 1.8V+0.1V/-0.1V Power Supply.
* DLL circuitry for wide output data valid window and future freguency scaling.
* I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
* Pipelined, double-data rate operation.
* Common data input/output
Datasheet Details
S7K6418T2M, S7K6436T2M
NETSOL
400.91 KB
2mx36 & 4mx18 ddrii+ cio bl2 sram.
This datasheet PDF includes multiple part numbers: S7K6418T2M, S7K6436T2M.
Please refer to the document for exact specifications by model.
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