NT5DS16M8AW Datasheet - Nanya Technology

NT5DS16M8AW (NT5DSxxMxAx) 128Mb DDR333/300 SDRAM

The 128Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. It is internally configured as a quad-bank DRAM. Read or Write command are used to select the bank and the starting column location for the burst access. The DDR SDRAM provides for programmable Read .

NT5DS16M8AW Features

* CAS Latency and Frequency Maximum Operating Frequency (MHz)

* DDR333 DDR300 (-6) (-66) 2 133 133 2.5 166 150

* Values are nominal (exact tCK should be used). CAS Latency

* Double data rate architecture: two data transfers per clock cycle

* Bidirectional data strobe (DQS) is t

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