NT5DS32M8AT Datasheet (Nanya) - 256Mb DDR333/300 SDRAM

NT5DS32M8AT, 256Mb DDR333/300 SDRAM

The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits.

It is internally configured as a quad-bank DRAM.

The DDR SDRAM provides for programmable Read or Write burst lengths of 2, 4 or 8 locations.

An Auto Precharge function may be enabled to provide a self

NT5DS32M8AT Features

* CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz)

* DDR333 (-6) DDR300 (-66) 133 133 166 150

* Double data rate architecture: two data transfers per clock cycle

* Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capt