Datasheet4U Logo Datasheet4U.com

54173 - TRI-STATE Quad Registers

Datasheet Summary

Description

These four-bit registers contain D-type flip-flops with totempole TRI-STATE outputs capable of driving highly capacitive or low-impedance loads The high-impedance state and increased high-logic-level drive provide these flip-flops with the capability of driving the bus lines in a bus-organized syste

Features

  • Y Y Y Y Y Y Y Y TRI-STATE outputs interface directly with system bus Gated output control lines for enabling or disabling the outputs Fully independent clock elminates restrictions for operating in one of two modes Parallel load Do nothing (hold) For.

📥 Download Datasheet

Datasheet preview – 54173

Datasheet Details

Part number 54173
Manufacturer National Semiconductor
File Size 131.39 KB
Description TRI-STATE Quad Registers
Datasheet download datasheet 54173 Datasheet
Additional preview pages of the 54173 datasheet.

📁 Similar Datasheet

  • 541 - HIGH POWER OP-AMP (ETC)
  • 5410 - VCXO (NPC)
  • 54109 - Dual J-K Positive-Edge-Triggered Flip-Flops (Texas Instruments)
  • 5410CR - EL5410CR (ETC)
  • 5412 - Triple 3-Input NAND Gate (Fairchild Semiconductor)
  • 54122 - Retriggerable Monostable Multivibrators (Texas Instruments)
  • 54123 - Retriggerable Monostable Multivibrators (Texas Instruments)
  • 54125 - QUADRUPLE BUS BUFFERS (Texas Instruments)
  • 54126 - QUADRUPLE BUS BUFFERS (Texas Instruments)
  • 5412DM - Triple 3-Input NAND Gate (Fairchild Semiconductor)
Other Datasheets by National Semiconductor
  • 5417 - High Voltage Open-Collector Outputs
  • 54170 - 4 x 4 Register File
  • 54174 - Hex/Quad D Flip-Flops with Clear
  • 54175 - Hex/Quad D Flip-Flops with Clear
  • 5410 - Triple 3-Input NAND Gates
  • 54121 - Monostable Multivibrator
  • 54122 - Retriggerable Resettable Multivibrator
  • 54125 - Quad TRI-STATE Buffers

Full PDF Text Transcription

Click to expand full text
54173 DM54173 DM74173 TRI-STATE Quad D Registers June 1989 54173 DM54173 DM74173 TRI-STATE Quad D Registers General Description These four-bit registers contain D-type flip-flops with totempole TRI-STATE outputs capable of driving highly capacitive or low-impedance loads The high-impedance state and increased high-logic-level drive provide these flip-flops with the capability of driving the bus lines in a bus-organized system without need for interface or pull-up components Gated enable inputs are provided for controlling the entry of data into the flip-flops When both data-enable inputs are low data at the D inputs are loaded into their respective flipflops on the next positive transition of the buffered clock input Gate output control inputs are also provided When both are low the norm
Published: |