54175 Datasheet, Clear, National Semiconductor

54175 Features

• Clear complementary outputs from each flip-flop Information at the D inputs meeting the setup and hold time requirements is transferred to the Q outputs on the positivegoing edge of the clock

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54175

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National Semiconductor

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📄 Datasheet

Description:

Hex/quad d flip-flops with clear. These positive-edge triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and

54175 Application

• Applications include Buffer storage registers Shift registers Pattern generators Typical clock frequency 40 MHz Typical power dissipation per flip-f

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54175

National Semiconductor

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