LM2507 Datasheet - National Semiconductor

LM2507 Display interface Serializer/Deserializer

The LM2507 device adapts i80 CPU style display interfaces to the Mobile Pixel Link (MPL) Level zero serial link. When using smart CPU type interfaces, two chip selects support a main and sub display. A mode pin configures the device as a Master (MST) or Slave (SLV) so the same chip can be used on bo.

LM2507 Features

* n CPU Display Interface support up to 800 x 300 1⁄2SVGA formats n Dual displays supported

* CS1

* & CS2

* n MPL-Level 0 Physical Layer using two data and one clock signal n Low Power Consumption n Pinout mirroring enables straight through layout with minimal vias n Level translation be

LM2507_NationalSemiconductor.pdf