MC100EL34

Clock Generation Chip

ON Semiconductor

MC100EL34 Features

* 50 ps Output-to-Output Skew

* Synchronous Enable/Disable

* Master Reset for Synchronization

* PECL Mode Operating Range:

* VCC = 4.2 V to 5.7 V with VEE = 0 V

* NECL Mode Operating Range:

* VCC = 0 V with VEE =

* 4.2 V to

* 5.7

MC100EL34 General Description

The MC10/100EL34 is a low skew ÷2, ÷4, ÷8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The VBB pin, an internally generated voltage supply, is a.

MC100EL34 Datasheet (265.53 KB)